Veteran Microsoft Engineer Builds Custom RAM for Vintage PDP-11

Dave Plummer, a former Microsoft engineer associated with Task Manager and Windows Pinball, built a custom RAM board for a vintage PDP-11 after seeing the price of memory for the machine. He used ChatGPT and the EasyEDA online circuit simulator, although he said he had not done complicated projects like this before. The board was designed as a standalone card and tested on a backplane with an M8190 CPU board.

Hardware design

Plummer designed the RAM as a standalone card because several PDP-11 models used Q-Bus boards for main system components. He placed a Lattice MachXO2 FPGA, model 2000HC, on the board to serve as a memory controller, and connected it to four ISSI 1 MB memory chips. He also added a U2S I/O chip, a bank of DIP switches, comm ports, and a handful of capacitors to complete the circuit.

The M8190 board design has a 22-bit bus and reserves the top 256 KB for I/O and ROM. The PDP-11 is from 1970, and later models could fit in as much as four megabytes of memory.

A memory bus quirk

The project was not successful on the first attempt. Plummer had never flash-programmed an FPGA chip before, and he fixed that after a few attempts.

He then ran into a PDP-11 memory bus design issue. The bus can only access entire words of two bytes at once, and it treats the lowest bit in a memory address as a lane selector that picks between the low or high byte in the word. When reading, the CPU selects the right byte itself, but the memory controller still needs to return two bytes. On writes, the bit selector must be read and the proper byte selected so only that byte is updated, because the bus lines still carry an entire word that could otherwise write invalid data.

Plummer seemingly was not aware of this before. One commenter joked that he had built 4 MB of memory that turned out to be 2 MB, and Plummer replied that the memory only returns every second word, matching the design pattern. There have been no further updates; the assumption is that he applied a simple fix in his FPGA code after more commenters pointed out the flaw.

Alternative suggestions

One person suggested sidestepping the problem by implementing the memory in software with a Raspberry Pi wired directly to the PDP bus. Plummer replied that he had basically done that already last week with a modern QBone DEC interface board, which contains a Beaglebone Black on top of it, similar to a Raspberry Pi.

A forum commenter called the project neat and said lowering the bar to knowledge via AI is a big deal.

Sources: Tom's Hardware